1. 1. Setting Things Up
    1. 1.1. Setting up the compiler
    2. 1.2. Setting up the linker
    3. 1.3. Setting up the Riscv Virtual environment
    4. 1.4. Setting up the Build automation tool
  2. 2. writing a bare metal Rust executable
  3. 3. boot_design
  4. 4. Boot Design
  5. 5. The Bootloader
  6. 6. The Bootloader_2
  7. 7. Setting Up Communications
    1. 7.1. Designs and layouts
    2. 7.2. General Theory on communication
    3. 7.3. The UART
    4. 7.4. More About the UART
    5. 7.5. Programming_the_UART
  8. 8. Theory on Paging
    1. 8.1. segmentation
    2. 8.2. paging
  9. 9. Setting Up Memory Management
  10. 10. Designs
    1. 10.1. The RAM Management
      1. 10.1.1. Abstracting the RAM
      2. 10.1.2. Allocating RAM Memory
      3. 10.1.3. Byte-grained allocation
      4. 10.1.4. Setting Up RAM Memory Virtualization and access_management
      5. 10.1.5. Using the Physical MMU instead of Virtual MMU
      6. 10.1.6. Actual_implementation
  11. 11. Handling interrupts and Traps
  12. 12. Handling interrupts and Traps 2
    1. 12.1. Exceptions
    2. 12.2. Timer_interrupt
    3. 12.3. External Interrupt
      1. 12.3.1. UART Interrupt
  13. 13. Handling External Interrupts
  14. 14. Setting up Processes
  15. 15. Processes Version 2
  16. 16. The Block Driver
  17. 17. system_calls
  18. 18. Filesystem
  19. 19. User Processes
  20. 20. Overall Design
  21. 21. Definitions and Theories
    1. 21.1. The linker
    2. 21.2. Qemu
    3. 21.3. fragmentation_issues
    4. 21.4. Memory Tracking Mechanisms
    5. 21.5. Theory on MMU implementation in Riscv
    6. 21.6. VirtIO
  22. 22. Miscellenious
    1. 22.1. Error Numbers
    2. 22.2. Measuring Performance of software
    3. 22.3. Importing variables from the Linker script
    4. 22.4. GNU assembly macros
    5. 22.5. The singleton Structure
    6. 22.6. Multitasking
    7. 22.7. Bitmasking_and_bit_operations
    8. 22.8. Compressed Instructions
    9. 22.9. The ABI
    10. 22.10. Elf Files
    11. 22.11. Riscv_registers
    12. 22.12. Virtual representation of riscv in Qemu
      1. 22.12.1. PCIe express devices
      2. 22.12.2. VIRTIO devices
    13. 22.13. Global Allocator
    14. 22.14. Falling_to_fly
  23. 23. AfterMath
    1. 23.1. buffer_overflow_attacks
    2. 23.2. fork_bomb
  24. 24. Web Assembly
    1. 24.1. Literature review papers
      1. 24.1.1. Software_deployment
    2. 24.2. Setting Up Wasm Runtime
    3. 24.3. webassembly_challenges
    4. 24.4. The Book
    5. 24.5. Using A Wasm Runtime in a no-std environment
  25. 25. RISCV_RUN
    1. 25.1. reasons_for_RISCV
    2. 25.2. priviledged_architecture
    3. 25.3. error_handling_in_machine_mode
    4. 25.4. seperating_user_mode_from_machine_mode
    5. 25.5. Supervisor_mode_to_the_rescue
    6. 25.6. Learning_magic
      1. 25.6.1. resources
      2. 25.6.2. random_notes
  26. 26. References
  27. 27. Problem_statement
  28. 28. Implementations
  29. 29. Debugging in Rust
  30. 30. Qemu Configurations
  31. 31. Link Scripts
  32. 32. Documentation
    1. 32.1. mermaid
  33. 33. Testing
    1. 33.1. No-Std Testing
    2. 33.2. Unit Tests
    3. 33.3. Integration Tests
  34. 34. Debugging

Developer Documentation

VIRTIO devices